Compiler transformations for high-performance computing
ACM Computing Surveys (CSUR)
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PLDI '95 Proceedings of the ACM SIGPLAN 1995 conference on Programming language design and implementation
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ICS '99 Proceedings of the 13th international conference on Supercomputing
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ACM Transactions on Programming Languages and Systems (TOPLAS)
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ACM SIGARCH Computer Architecture News - Special issue on interaction between compilers and computer architectures
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Proceedings of the Fourth International Workshop on Languages and Compilers for Parallel Computing
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PACT '98 Proceedings of the 1998 International Conference on Parallel Architectures and Compilation Techniques
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ICCD '97 Proceedings of the 1997 International Conference on Computer Design (ICCD '97)
Automatic tiling of iterative stencil loops
ACM Transactions on Programming Languages and Systems (TOPLAS)
An accurate cost model for guiding data locality transformations
ACM Transactions on Programming Languages and Systems (TOPLAS)
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Program locality exploitation is a key issue to reduce the execution time of scientific applications, so as many techniques have been designed for locality optimization. This paper presents new compiler algorithms based on array padding that optimize program locality either locally (at loop level) or globally (the whole program). We first introduce a formal cache model that is used to analyze how all cache levels are filled up when arrays inside nested loops are referenced. We further study the relation between the model parameters and the data memory layout of the arrays, and define how to pad those arrays in order to optimize cache occupation at all levels. Experimental evaluation on some numerical benchmarks shows the benefits of our approach.