A Comparison of Evolvable Hardware Architectures for Classification Tasks

Authors:
Kyrre Glette;Jim Torresen;Paul Kaufmann;Marco Platzner
Affiliations:
Department of Informatics, University of Oslo, Oslo, Norway 0316;Department of Informatics, University of Oslo, Oslo, Norway 0316;University of Paderborn, Department of Computer Science, Paderborn, Germany 33098;University of Paderborn, Department of Computer Science, Paderborn, Germany 33098
Venue:
ICES '08 Proceedings of the 8th international conference on Evolvable Systems: From Biology to Hardware
Year:
2008

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Abstract

We analyze and compare four different evolvable hardware approaches for classification tasks: An approach based on a programmable logic array architecture, an approach based on two-phase incremental evolution, a generic logic architecture with automatic definition of building blocks, and a specialized coarse-grained architecture with pre-defined building blocks. We base the comparison on a common data set and report on classification accuracy and training effort. The results show that classification accuracy can be increased by using modular, specialized classifier architectures. Furthermore, function level evolution, either with predefined functions derived from domain-specific knowledge or with functions that are automatically defined during evolution, also gives higher accuracy. Incremental and function level evolution reduce the search space and thus shortens the training effort.