Nonuniform Cache Architectures for Wire-Delay Dominated On-Chip Caches

  • Authors:
  • Changkyu Kim;Doug Burger;Stephen W. Keckler

  • Affiliations:
  • The University of Texas at Austin;The University of Texas at Austin;The University of Texas at Austin

  • Venue:
  • IEEE Micro
  • Year:
  • 2003

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Abstract

Nonuniform cache access designs solve the on-chip wire delay problem for future large integrated caches. By embedding a network in the cache, NUCA designs let data migrate within the cache, clustering the working set nearest the processor.