Go/No-Go testing of VCO modulation RF transceivers through the delayed-RF setup
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
System-on-Chip Test Architectures: Nanometer Design for Testability
System-on-Chip Test Architectures: Nanometer Design for Testability
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For today's large, mixed-signal designs, test generation requires propagating signals through digital and analog modules. This article offers an innovative seamless approach that defines a digital test methodology for digital modules wherein the test inputs and responses can be propagated through a path containing analog signals.