Itanium 2 Processor 6M: Higher Frequency and Larger L3 Cache

Authors:
Stefan Rusu;Harry Muljono;Brian Cherkauer
Affiliations:
Intel Corp.;Intel Corp.;Intel Corp.
Venue:
IEEE Micro
Year:
2004

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Abstract

In designing the next generation of the Itanium 2 processor, Intel doubled the on-die, level-three cache to 6 Mbytes and increased frequency by 50 percent compared to the previous generation. Another goal was to keep the power dissipation of the new design within the same envelope as its predecessor.