A two-step computation of cyclic redundancy code CRC-32 for ATM networks
IBM Journal of Research and Development
Instruction set extensions for software defined radio
Microprocessors & Microsystems
FlowChecker: Detecting Bugs in MPI Libraries via Message Flow Checking
Proceedings of the 2010 ACM/IEEE International Conference for High Performance Computing, Networking, Storage and Analysis
Using DSP blocks to compute CRC hash in FPGA (abstract only)
Proceedings of the 2014 ACM/SIGDA international symposium on Field-programmable gate arrays
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A cyclic redundancy code can be calculated on bytes instead of bits. One byte-oriented method reduces calculation time by a factor of almost four.