Computation of cyclic redundancy checks via table look-up
Communications of the ACM
Preserving the integrity of cyclic-redundancy checks when protected text is intentionally altered
IBM Journal of Research and Development
Error control aspects of high speed networks
IEEE INFOCOM '92 Proceedings of the eleventh annual joint conference of the IEEE computer and communications societies on One world through communications (Vol. 1)
Software support for outboard buffering and checksumming
SIGCOMM '95 Proceedings of the conference on Applications, technologies, architectures, and protocols for computer communication
Fast software implementation of error detection codes
IEEE/ACM Transactions on Networking (TON)
Data and computer communications (5th ed.)
Data and computer communications (5th ed.)
Buffer management and flow control in the Credit Net ATM host interface
LCN '95 Proceedings of the 20th Annual IEEE Conference on Local Computer Networks
IEEE Micro
Hardware design and VLSI implementation of a byte-wise CRC generator chip
IEEE Transactions on Consumer Electronics
An analysis of TCP processing overhead
IEEE Communications Magazine
Hardware/software organization of a high-performance ATM host interface
IEEE Journal on Selected Areas in Communications
Cells-In-Frames: a system overview
IEEE Network: The Magazine of Global Internetworking
Managing routing tables for URL routers in content distribution networks
International Journal of Network Management
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A Cyclic Redundancy Check (CRC) code is used by many communications protocols for packet error detection. Computation of CRC for an entire packet is easily implemented in hardware if packets are transmitted and received in contiguous form. In an ATM network, packets are fragmented into cells and, in the case of multiple virtual circuits, their transmission is overlapped, resulting in non-contiguous packets. For non-contiguous packets with a 32-bit CRC (CRC-32), as in the case of ATM Adaptation Layer 5 (AAL5), an efficient algorithm for computing the CRC for an entire packet based on combining packet fragment CRCs (e.g., cell CRCs) is developed in this paper. In this algorithm, the network hardware generates cell or partial packet CRCs and the host system software combines these CRCs into a full packet CRC. Several important properties for CRCs are described and proved, and the correctness of the algorithm developed from these properties is then also formally proved. The algorithm has direct application to the proposed Cells-In-Frames (CIF) architecture for support of ATM AAL5 services on Ethernet. When implemented in software, the algorithm is shown to be significantly faster than a table-based software computation of packet CRC-32. The algorithm is also applicable to networking devices that need to change the contents of a packet and quickly recompute the packet CRC based only on the changed portions of the packet.