Data networks
The tea-leaf reader algorithm: an efficient implementation of CRC-16 and CRC-32
Communications of the ACM
Computer networks
The art of computer programming, volume 2 (3rd ed.): seminumerical algorithms
The art of computer programming, volume 2 (3rd ed.): seminumerical algorithms
Weighted sum codes for error detection and their comparison with existing codes
IEEE/ACM Transactions on Networking (TON)
Fast software implementation of error detection codes
IEEE/ACM Transactions on Networking (TON)
WebExpress: a client/intercept based system for optimizing Web browsing in a wireless environment
Mobile Networks and Applications - Special issue: mobile networking in the Internet
An Efficient Signature Computation Method
IEEE Design & Test
Fast computation of MISR signatures
VLSID '95 Proceedings of the 8th International Conference on VLSI Design
Managing routing tables for URL routers in content distribution networks
International Journal of Network Management
Error-Detection Codes: Algorithms and Fast Implementation
IEEE Transactions on Computers
Fault Tolerance Design in JPEG 2000 Image Compression System
IEEE Transactions on Dependable and Secure Computing
Imaging as an alternative data channel for camera phones
MUM '06 Proceedings of the 5th international conference on Mobile and ubiquitous multimedia
A scalable and high performance software iSCSI implementation
FAST'05 Proceedings of the 4th conference on USENIX Conference on File and Storage Technologies - Volume 4
Analyzing the impact of supporting out-of-order communication on in-order performance with iWARP
Proceedings of the 2007 ACM/IEEE conference on Supercomputing
A Light Number-Generation Scheme for Feasible and Secure Credit-Card-Payment Solutions
EC-Web '08 Proceedings of the 9th international conference on E-Commerce and Web Technologies
An Empirical Analysis of Disk Sector Hashes for Data Carving
Journal of Digital Forensic Practice
Design and implementation of a field programmable CRC circuit architecture
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Sockets direct protocol for hybrid network stacks: a case study with iWARP over 10G Ethernet
HiPC'08 Proceedings of the 15th international conference on High performance computing
High speed CRC with 64-bit generator polynomial on an FPGA
ACM SIGARCH Computer Architecture News
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Cyclic Redundancy Check (CRC) codes provide a simple yet powerful method of error detection during digital data transmission. Use of a table look-up in computing the CRC bits will efficiently implement these codes in software.