Dynamic and distributed frequency assignment for energy and latency constrained MP-SoC
Proceedings of the Conference on Design, Automation and Test in Europe
On line power optimization of data flow multi-core architecture based on vdd-hopping for local DVFS
PATMOS'10 Proceedings of the 20th international conference on Integrated circuit and system design: power and timing modeling, optimization and simulation
A self-adaptable distributed DFS scheme for NoC-based MPSoCs
Proceedings of the 24th symposium on Integrated circuits and systems design
Neuron constraints to model complex real-world problems
CP'11 Proceedings of the 17th international conference on Principles and practice of constraint programming
A multichannel design for QoS aware energy efficient clustering and routing in WMSN
International Journal of Sensor Networks
Decentralized control for dynamically reconfigurable FPGA systems
Microprocessors & Microsystems
Performance-driven dynamic thermal management of MPSoC based on task rescheduling
ACM Transactions on Design Automation of Electronic Systems (TODAES)
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With forecasted hundreds of Processing Elements (PE), future embedded systems will be able to handle multiple applications with very diverse running constraints. In order to avoid hot-spots and control the temperature of the tiles, Dynamic Voltage-Frequency Scaling (DVFS) can be applied at PE level. At system level, it implies to dynamically manage the different voltage-frequency couples of each PE in order to obtain a global optimization. In this article we present an approach based on Game Theory, which adjusts at run-time the frequency of each PE. It aims at reducing the tile temperature while maintaining the synchronization between the tasks of the application graph. A fully distributed scheme is assumed in order to build a scalable mechanism. Results show that the proposed run-time algorithm find solutions in few calculation cycles achieving temperature reductions of about 23%.