Survey of Advanced CABAC Accelerator Architectures for Future Multimedia
ARC '09 Proceedings of the 5th International Workshop on Reconfigurable Computing: Architectures, Tools and Applications
CABAC Accelerator Architectures for Video Compression in Future Multimedia: A Survey
SAMOS '09 Proceedings of the 9th International Workshop on Embedded Computer Systems: Architectures, Modeling, and Simulation
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Two statistical coding tools - the Context-based Adaptive Variable Length Coding (CAVLC) and the Context-based Adaptive Binary Arithmetic Coding (CABAC) - have been adopted in different profiles of the H.264/AVC video coding standard. The throughput at the statistical coding stage is mainly constrained by the high data dependency and sequential coding nature of CAVLC and CABAC. Many hardware designs have been proposed to remove the bottlenecks and accelerate statistical coding and decoding of H.264/AVC. In this paper, different implementation strategies of CAVLC and CABAC encoder and decoder architectures are investigated. The strategies are evaluated using criteria such as circuit area, processing time, and power consumption. The three most important techniques used are: multi-symbol processing, table lookup optimization, and critical path reduction by data prefetch and pre-calculation. In the discussion of CABAC encoder design, our implementation strategies are introduced and compared with other reported designs.