Survey of Advanced CABAC Accelerator Architectures for Future Multimedia

Authors:
Yahya Jan;Lech Jozwiak
Affiliations:
Faculty of Electrical Engineering, Eindhoven University of Technology, The Netherlands;Faculty of Electrical Engineering, Eindhoven University of Technology, The Netherlands
Venue:
ARC '09 Proceedings of the 5th International Workshop on Reconfigurable Computing: Architectures, Tools and Applications
Year:
2009

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Abstract

The future high quality multimedia systems require efficient video coding algorithms and corresponding adaptive high-performance computational platforms. In this paper, we survey the hardware accelerator architectures for Context-based Adaptive Binary Arithmetic Coding (CABAC) of H.264/AVC. The purpose of the survey is to deliver a critical insight in the proposed solutions, and this way facilitate further research on accelerator architectures, architecture development methods and supporting EDA tools. The architectures are analyzed, classified and compared based on the core hardware acceleration concepts, algorithmic characteristics, video resolution support and performance parameters, and some promising design directions are discussed.