Automatic Detection of Spatial Signature on Wafermaps in a High Volume Production
DFT '99 Proceedings of the 14th International Symposium on Defect and Fault-Tolerance in VLSI Systems
A Statistical Parametric and Probe Yield Analysis Methodology
DFT '96 Proceedings of the 1996 Workshop on Defect and Fault-Tolerance in VLSI Systems
LIBSVM: A library for support vector machines
ACM Transactions on Intelligent Systems and Technology (TIST)
Hybrid machine learning to improve predictive performance
ACC'08 Proceedings of the WSEAS International Conference on Applied Computing Conference
Predictive Performance of Clustered Feature-Weighting Case-Based Reasoning
ADMA '08 Proceedings of the 4th international conference on Advanced Data Mining and Applications
Recognizing yield patterns through hybrid applications of machine learning techniques
Information Sciences: an International Journal
Development of a multi-agent-based distributed simulation platform for semiconductor manufacturing
Expert Systems with Applications: An International Journal
Assessing and classifying risk of pipeline third-party interference based on fault tree and SOM
Engineering Applications of Artificial Intelligence
Detection and classification of defect patterns in optical inspection using support vector machines
ICIC'13 Proceedings of the 9th international conference on Intelligent Computing Theories
| Hi-index | 12.05 |
As manufacturing geometries continue to shrink and circuit performance increases, fast fault detection and semiconductor yield improvement is of increasing concern. Circuits must be controlled to reduce parametric yield loss, and the resulting circuits tested to guarantee that they meet specifications. In this paper, a hybrid approach that integrates the Self-Organizing Map and Support Vector Machine for wafer bin map classification is proposed. The log odds ratio test is employed as a spatial clustering measurement preprocessor to distinguish between the systematic and random wafer bin map distribution. After the smoothing step is performed on the wafer bin map, features such as co-occurrence matrix and moment invariants are extracted. The wafer bin maps are then clustered with the Self-Organizing Map using the aforementioned features. The Support Vector Machine is then applied to classify the wafer bin maps to identify the manufacturing defects. The proposed method can transform a large number of wafer bin maps into a small group of specific failure patterns and thus shorten the time and scope for troubleshooting to yield improvement. Real data on over 3000 wafers were applied to the proposed approach. The experimental results show that our approach can obtain over 90% classification accuracy and outperform back-propagation neural network.