Single Miller capacitor frequency compensation with nulling resistor for three-stage amplifiers

Authors:
S. O. Cannizzaro;A. D. Grasso;G. Palumbo;S. Pennisi
Affiliations:
Dipartimento di Ingegneria Elettrica Elettronica e dei Sistemi (DIEES), Universita' di Catania, Viale Andrea Doria 6, I-95125 Catania, Italy;Dipartimento di Ingegneria Elettrica Elettronica e dei Sistemi (DIEES), Universita' di Catania, Viale Andrea Doria 6, I-95125 Catania, Italy;Dipartimento di Ingegneria Elettrica Elettronica e dei Sistemi (DIEES), Universita' di Catania, Viale Andrea Doria 6, I-95125 Catania, Italy;Dipartimento di Ingegneria Elettrica Elettronica e dei Sistemi (DIEES), Universita' di Catania, Viale Andrea Doria 6, I-95125 Catania, Italy
Venue:
International Journal of Circuit Theory and Applications
Year:
2008

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Abstract

A frequency compensation technique for three-stage amplifiers is introduced. The proposed solution exploits only one Miller capacitor and a resistor in the compensation network. The straightness of the technique is used to design, using a standard CMOS 0.35-µm process, a 1.5-V OTA driving a 150-pF load capacitor. The dc consumption is about 14µA at DC and a 1.8-MHz gain–bandwidth product is obtained, providing significant improvement in both (MHzpF)-mA and ((V-µs)pF)-mA performance parameters. Copyright © 2007 John Wiley & Sons, Ltd.