Compilers: principles, techniques, and tools
Compilers: principles, techniques, and tools
Multithreaded processor architectures
IEEE Spectrum
BASEMENT: An Architecture and Methodology for Distributed Automotive Real-Time Systems
IEEE Transactions on Computers
MediaBench: a tool for evaluating and synthesizing multimedia and communicatons systems
MICRO 30 Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture
Lx: a technology platform for customizable VLIW embedded processing
Proceedings of the 27th annual international symposium on Computer architecture
An Architectural Framework for Runtime Optimization
IEEE Transactions on Computers
Inter-task register-allocation for static operating systems
Proceedings of the joint conference on Languages, compilers and tools for embedded systems: software and compilers for embedded systems
Computer
The Alpha 21264 Microprocessor
IEEE Micro
A SMART scheduler for multimedia applications
ACM Transactions on Computer Systems (TOCS)
Mini-Threads: Increasing TLP on Small-Scale SMT Processors
HPCA '03 Proceedings of the 9th International Symposium on High-Performance Computer Architecture
Understanding the Linux Kernel, Second Edition
Understanding the Linux Kernel, Second Edition
Software thread integration for hardware to software migration
Software thread integration for hardware to software migration
Software Thread Integration and Synthesis for Real-Time Applications
Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Balancing register pressure and context-switching delays in ASTI systems
Proceedings of the 2005 international conference on Compilers, architectures and synthesis for embedded systems
Proceedings of the 38th annual IEEE/ACM International Symposium on Microarchitecture
MiBench: A free, commercially representative embedded benchmark suite
WWC '01 Proceedings of the Workload Characterization, 2001. WWC-4. 2001 IEEE International Workshop
TinyOS: An Open Operating System for Wireless Sensor Networks (Invited Seminar)
MDM '06 Proceedings of the 7th International Conference on Mobile Data Management
MANTIS OS: an embedded multithreaded operating system for wireless micro sensor platforms
Mobile Networks and Applications
Surplus fair scheduling: a proportional-share CPU scheduling algorithm for symmetric multiprocessors
OSDI'00 Proceedings of the 4th conference on Symposium on Operating System Design & Implementation - Volume 4
Discovering and Exploiting Program Phases
IEEE Micro
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Preemptive multitasking is widely used in many low-cost and real-time embedded applications for its superior hardware utilization. The frequent and asynchronous context switches, however, require the preservation and restoration of the task state, thus resulting in a large number of memory transfer instructions. As a consequence, task responsiveness and application throughput can be significantly deteriorated. To address this problem we propose a cross-layer customization framework which through the close cooperation of compiler, OS, and hardware architecture achieves rapid and low-cost task switch. Application information extracted during compile-time regarding state liveness is exploited in order to preserve a minimal amount of task state on task preemption. We introduce two complementary techniques to implement the application-aware state preservation. The first technique utilizes compiler-generated custom routines which preserve/restore an extremely small live context at judiciously selected points in the application code. The second technique requires more sophisticated hardware support. It employs an OS-controlled register file mapping to achieve a rapid context switch. By mapping a small fraction of the register file in a single clock cycle, a context switch is achieved requiring no memory transfers for the majority of cases to preserve/restore the live state. The effect of aggressively replicated register files, where each task is given its own replica, is achieved with the hardware cost of only adding from 25% to 50% extra physical registers. Through the utilization of these novel mechanisms, a significant improvement on task response time is achieved as the context-switch cost is minimized.