The Organization of Computations for Uniform Recurrence Equations
Journal of the ACM (JACM)
Synthesis and Optimization of Digital Circuits
Synthesis and Optimization of Digital Circuits
Scheduling and Automatic Parallelization
Scheduling and Automatic Parallelization
Logic Synthesis and Verification Algorithms
Logic Synthesis and Verification Algorithms
Algorithms for VLSI Design Automation
Algorithms for VLSI Design Automation
Computations of Uniform Recurrence Equations Using Minimal Memory Size
SIAM Journal on Computing
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We address the following problem: given a synchronous digital circuit, is it possible to construct a new circuit computing the same function as the original one but using a minimal number of registers? We show that the minimal number of registers is the size of the minimal cut on a bi-infinite graph, namely the unfolding of the dependencies in the digital circuit. Furthermore, the construction of such a cut and the corresponding circuit can be done in polynomial time, using a max-flow min-cut result of Orlin for one-periodic bi-infinite graphs. Finally, we show the relation between this construction and the retiming technique introduced by Leiserson and Saxe.