Logic synthesis for efficient pseudoexhaustive testability

  • Authors:
  • Andrzej Krasniewski

  • Affiliations:
  • Department of Electrical Engineering, University of Rochester, Rochester, NY and Institute of Telecommunications, Warsaw University of Technology, Poland

  • Venue:
  • DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
  • Year:
  • 1991

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Abstract