ACM Transactions on Embedded Computing Systems (TECS)
Hybrid interconnect design for heterogeneous hardware accelerators
Proceedings of the Conference on Design, Automation and Test in Europe
Application space exploration of a heterogeneous run-time configurable digital signal processor
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
| Hi-index | 0.00 |
Editor's note:The diversification of the SoC market has increased the need for domain-specific programmable platforms that can be tailored to postfabrication products. This article presents a design case study on the interconnect for such a programmable platform, as part of the Morpheus project.—Li-Shiuan Peh, Princeton University