Fault Testing and Diagnosis in Combinational Digital Circuits
IEEE Transactions on Computers
Fault Tolerance of a General Purpose Computer Implemented by Very Large Scale Integration
IEEE Transactions on Computers
Synthesis of Optimal Ambiguity Resolver Functions
IEEE Transactions on Computers
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LSI implementation of digital circuitry opens the door to the consideration of dramatically new approaches to the design of system fault diagnosis. New constraints have been added, such as the difficulty of inserting test access points internal to large pieces of circuitry. At the same time, failure modes seem to be changing with bonding lead failures increasing in importance. This paper presents an approach that leans heavily on the assumption that adding additional logic to a circuit is of little consequence, whereas it is important to reduce the access provided for testing capability. As the practicality of the proposed approach has not been examined in detail, the concept is primiarly presented to stimulate further study into the special problems and opportunities involved in diagnosis of LSI systems.