The Concept of Coverage and Its Effect on the Reliability Model of a Repairable System
IEEE Transactions on Computers
Functions for improving diagnostic resolution in an LSI environment
AFIPS '72 (Spring) Proceedings of the May 16-18, 1972, spring joint computer conference
Design of serviceability features for the IBM system/360
IBM Journal of Research and Development
Behavioral synthesis of fault secure controller/datapaths using aliasing probability analysis
FTCS '96 Proceedings of the The Twenty-Sixth Annual International Symposium on Fault-Tolerant Computing (FTCS '96)
Exception Handling and Software Fault Tolerance
IEEE Transactions on Computers
An Algebraic Model of Fault-Masking Logic Circuits
IEEE Transactions on Computers
A cost effective approach for online error detection using invariant relationships
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
On Area and Yield Considerations for Fault-Tolerant VLSI Processor Arrays
IEEE Transactions on Computers
RSYN: a system for automated synthesis of reliable multilevel circuits
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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The construction of computer systems containing integrated circuit logic components with very large scale integration (VLSI), that is, many thousands of gates, is inevitable. Such levels of integration have already been achieved in memory components. There are significant problems in using some conventional fault-tolerant techniques in VLSI implementations for general purpose computers; consequently, modified approaches must be investigated.