ARCHER: an automated RF-IC Rx front-end circuit design tool

Authors:
Saul Rodriguez;Jad G. Atallah;Ana Rusu;Li-Rong Zheng;Mohammed Ismail
Affiliations:
ECS, ICT, Royal Institute of Technology (KTH), Stockholm, Sweden;ECS, ICT, Royal Institute of Technology (KTH), Stockholm, Sweden;ECS, ICT, Royal Institute of Technology (KTH), Stockholm, Sweden;ECS, ICT, Royal Institute of Technology (KTH), Stockholm, Sweden;ECS, ICT, Royal Institute of Technology (KTH), Stockholm, Sweden
Venue:
Analog Integrated Circuits and Signal Processing
Year:
2009

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Abstract

This paper presents a tool capable of automatically compiling the circuit of a direct-conversion receiver at the schematics level based on system specifications that include the frequency of operation, gain, noise figure, IIP2 and IIP3 linearity. The front-end of a direct-conversion receiver is built using inductive source degeneration (LSD) LNA and double-balanced source-degenerated Gilbert Cell mixers with charge injection. The tool uses power constrained noise and linearity optimization vector-space algorithms that automatically size the transistors, passive components, and find the optimum biasing points. The solution generated by the tool is automatically read by Agilent ADS where the blocks are easily fine-tuned and validated before layout. Case studies involving WiMAX, UMTS, GSM, Bluetooth and WLAN are presented to reveal the capabilities of the tool in reducing the design time.