Multiple specifications radio-frequency integrated circuit design with automatic template-driven layout retargeting

Authors:
Nuttorn Jangkrajarng;Sambuddha Bhattacharya;Roy Hartono;C-J. Richard Shi
Affiliations:
University of Washington, Seattle, WA;University of Washington, Seattle, WA;University of Washington, Seattle, WA;University of Washington, Seattle, WA
Venue:
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Year:
2004

Citing 5
Cited 4

Minplex—a compactor that minimizes the bounding rectangle and individual rectangles in a layout

DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Design and optimization of LC oscillators

ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Generation of Technology-Independent Retargetable Analog Blocks

Analog Integrated Circuits and Signal Processing
Design of Analog CMOS Integrated Circuits

Design of Analog CMOS Integrated Circuits
Device-level early floorplanning algorithms for RF circuits

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Template-based parasitic-aware optimization and retargeting of analog and RF integrated circuit layouts

Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
ARCHER: an automated RF-IC Rx front-end circuit design tool

Analog Integrated Circuits and Signal Processing
Cooperative template mechanism for cooperative design

CSCWD'05 Proceedings of the 9th international conference on Computer Supported Cooperative Work in Design II
Fast analog layout prototyping for nanometer design migration

Proceedings of the International Conference on Computer-Aided Design

Quantified Score

Hi-index	0.00

Visualization

Abstract

This paper presents an automatic layout retargeting tool that generates analog and RF layouts incorporating new device sizes and geometries based on new circuit specifications. A graph-based symbolic template is automatically constructed from a practical layout such that expert designer embedded in the layout is preserved. The template can be solved for multiple layouts based on different device sizes and geometries, satisfying several different specifications. Symmetry conservation and passive device modification are also embedded in the tool. The retargeting tool is demonstrated on a voltage controlled oscillator to generate three layouts with different target goals. While manual re-design is known to take days to finish, the automatic layout retargeting tool takes a few hours to generate a reusable template and takes minutes to generate comparable layouts.