ACM SIGARCH Computer Architecture News
Decentralized priority control in data communication
ISCA '75 Proceedings of the 2nd annual symposium on Computer architecture
A virtual memory for microprocessors
ISCA '75 Proceedings of the 2nd annual symposium on Computer architecture
Computer structures: Readings and examples (McGraw-Hill computer science series)
Computer structures: Readings and examples (McGraw-Hill computer science series)
A new architecture for mini-computers: the DEC PDP-11
AFIPS '70 (Spring) Proceedings of the May 5-7, 1970, spring joint computer conference
On a varistructured array of microprocessors
IEEE Transactions on Computers - Special issue on parallel processors and processing
Design and implementation of the banyan interconnection network in TRAC
AFIPS '80 Proceedings of the May 19-22, 1980, national computer conference
AFIPS '82 Proceedings of the June 7-10, 1982, national computer conference
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Conventional integrated circuit packaging techniques which use pins for input-output have several disadvantages, which are becoming increasingly important as more logic is put on a chip. Recent intensive development of optical links for long distance communications suggests that they could be used between integrated circuits, to alleviate the bottleneck created by the connection technology, so that LSI technology can be further exploited. However, the complex linkages between integrated circuit cannot be economically realized by just replacing each wire by an optical link; rather a "bus organization" should be developed so that, by time multiplexing one optical link that threads just once through each integrated circuit, different time slots can be used to realize any necessary transfer. Additionally, the time slices are controlled by a microprogram, so that "wiring changes" can be realized by program changes. A unified treatment of busses is first developed, then two physical realizations of the time-multiplexed bus are described.