A multithreading embedded architecture

Authors:
Lan Dong;Xiufeng Sui
Affiliations:
Computer Engineering Department, Beijing Jiaotong University, Beijing, China;Computer Engineering Department, Beijing Jiaotong University, Beijing, China
Venue:
DNCOCO'08 Proceedings of the 7th conference on Data networks, communications, computers
Year:
2008

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Abstract

More embedded microprocessors are emerging and more multithreaded tasks need to be executed simultaneously on embedded device. This paper proposes a multithreaded architecture for embedded processor. It improves the system performance in a large degree meanwhile considering reducing energy dissipation and improving the cache utilization in limited size.