Vectorized AES Core for High-throughput Secure Environments

Authors:
Miquel Pericàs;Ricardo Chaves;Georgi N. Gaydadjiev;Stamatis Vassiliadis;Mateo Valero
Affiliations:
Computer Sciences, Barcelona Supercomputing Center, and Computer Architecture Department, Technical University of Catalonia, Jordi Girona, Barcelona, Spain 08034;Instituto Superior Tecnico, INESC-ID,;Computer Engineering, Technical University of Delft, Delft, The Netherlands 2628 CD;Computer Engineering, Technical University of Delft, Delft, The Netherlands 2628 CD;Computer Sciences, Barcelona Supercomputing Center, and Computer Architecture Department, Technical University of Catalonia, Jordi Girona, Barcelona, Spain 08034
Venue:
High Performance Computing for Computational Science - VECPAR 2008
Year:
2008

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Abstract

Parallelism has long been used to increase the throughput of applications that process independent data. With the advent of multicore technology designers and programmers are increasingly forced to think in parallel. In this paper we present the evaluation of an encryption core capable of handling multiple data streams. The design is oriented towards future scenarios for internet, where throughput capacity requirements together with privacy and integrity will be critical for both personal and corporate users. To power such scenarios we present a technique that increases the efficiency of memory bandwidth utilization of cryptographic cores. We propose to feed cryptographic engines with multiple streams to better exploit the available bandwidth. To validate our claims, we have developed an AES core capable of encrypting two streams in parallel using either ECB or CBC modes. Our AES core implementation consumes trivial amount of resources when a Virtex-II Pro FPGA device is targeted.