Memory Efficient VLSI Architecture for QCIF to VGA Resolution Conversion

Authors:
Asmar A. Khan;Shahid Masud
Affiliations:
Department of Computer Science and Engineering, Lahore University of Management Sciences, Lahore, Pakistan 54792;Department of Computer Science and Engineering, Lahore University of Management Sciences, Lahore, Pakistan 54792
Venue:
PSIVT '09 Proceedings of the 3rd Pacific Rim Symposium on Advances in Image and Video Technology
Year:
2009

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Abstract

This paper presents the design of an FPGA based real time video display size resolution conversion for QCIF to VGA. The architecture is based on a pre-computed memory mapping that facilitates reduction in memory size and latency. The scheme has been realized for real time resolution conversion of a QCIF video at 30 fps. The memory requirement has been reduced to 400 KB which is significantly lower than an earlier hardware based scheme [2] where memory used was nearly 5 MB. The results have been validated on Xilinx Spartan-2E FPGA running at 100MHz. The area of complete design is around 66K gates including input and output memory.