Indirect adaptive routing on large scale interconnection networks
Proceedings of the 36th annual international symposium on Computer architecture
Firefly: illuminating future network-on-chip with nanophotonics
Proceedings of the 36th annual international symposium on Computer architecture
Exascale computing technology challenges
VECPAR'10 Proceedings of the 9th international conference on High performance computing for computational science
2-Dilated flattened butterfly: A nonblocking switching topology for high-radix networks
Computer Communications
Global misrouting policies in two-level hierarchical networks
Proceedings of the 2013 Interconnection Network Architecture: On-Chip, Multi-Chip
Scalable high-radix router microarchitecture using a network switch organization
ACM Transactions on Architecture and Code Optimization (TACO)
Memory-centric system interconnect design with hybrid memory cubes
PACT '13 Proceedings of the 22nd international conference on Parallel architectures and compilation techniques
A performance comparison of current HPC systems: Blue Gene/Q, Cray XE6 and InfiniBand systems
Future Generation Computer Systems
| Hi-index | 0.00 |
It is more efficient to use increasing pin bandwidth by creating high-radix routers with a large number of narrow ports instead of low-radix routers with fewer wide ports. Building networks using high-radix routers lowers cost and improves performance, but also presents many challenges. The dragonfly topology minimizes network cost by reducing the number of global channels required.