Improving the performance of bristled CC-NUMA systems using virtual channels and adaptivity
ICS '99 Proceedings of the 13th international conference on Supercomputing
Oblivious routing for LC permutations on hypercubes
Parallel Computing
Nonlockability in Multirings and Hypercubes at Serial Transmission of Data Blocks
Automation and Remote Control
Principles and Practices of Interconnection Networks
Principles and Practices of Interconnection Networks
The BlackWidow High-Radix Clos Network
Proceedings of the 33rd annual international symposium on Computer Architecture
Generalized crossed rings---multirings with a decreased degree of node
Automation and Remote Control
Flattened butterfly: a cost-efficient topology for high-radix networks
Proceedings of the 34th annual international symposium on Computer architecture
Generalized Hypercube and Hyperbus Structures for a Computer Network
IEEE Transactions on Computers
Implementing an OpenFlow switch on the NetFPGA platform
Proceedings of the 4th ACM/IEEE Symposium on Architectures for Networking and Communications Systems
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High-performance computing is highly dependent on the communication network connecting the nodes. In this paper, we propose a 2-Dilated flattened butterfly (2DFB) network which provides non-blocking performance for relatively low cost overhead. We study the topological properties of the proposed 2DFB network and compare it with different nonblocking switching topologies. We observe that a dilation factor of two is sufficient to obtain nonblocking property for a flattened butterfly structure irrespective of its size or dimension. Dilating each link in a flattened butterfly causes an increase in cost. Therefore, we modeled the implementation cost of a 2DFB network and compared it with other popular nonblocking networks. We observe that the cost of a 2DFB is less than other nonblocking networks, while at the same time providing reduced latency because of its reduced diameter and hop count. We also propose a procedure to develop a conflict-free static routing schedule as well as an adaptive load balanced routing scheme (ALDFB) for 2DFB networks. Finally, we also describe the hardware implementation of a 2DFB network using the NetFPGA as the switching element and verify the nonblocking behavior of a 2DFB. We also show that the 2DFB topology can be used to build high speed switching systems with reduced cost.