Data flow computing
A Formal Definition of Data Flow Graph Models
IEEE Transactions on Computers
Visual programming
Communicating and mobile systems: the &pgr;-calculus
Communicating and mobile systems: the &pgr;-calculus
Theoretical Computer Science
ACM Computing Surveys (CSUR)
Communicating sequential processes
Communications of the ACM
Reconfigurable computing: a survey of systems and software
ACM Computing Surveys (CSUR)
A high-level visual language for the graphical description of digital circuits
VL '95 Proceedings of the 11th International IEEE Symposium on Visual Languages
Proceedings of the 4th ACM international conference on Embedded software
An Asynchronous Dataflow FPGA Architecture
IEEE Transactions on Computers
A brief history of process algebra
Theoretical Computer Science - Process algebra
VLHCC '05 Proceedings of the 2005 IEEE Symposium on Visual Languages and Human-Centric Computing
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A concurrent model of computation and a language based on the model for bit-level operation are useful for developing asynchronous and concurrent programs compositionally, which frequently use bit-level operations. Some examples are programs for video games, hardware emulation (including virtual machines), and signal processing. However, few models and languages are optimized and oriented to bit-level concurrent computation. We previously developed a visual programming language called A-BITS for bit-level concurrent programming. The language is based on a dataflow-like model that computes using processes that provide serial bit-level operations and FIFO buffers connected to them. It can express bit-level computation naturally and develop compositionally. We then devised a concurrent computation model called APEC (Asynchronous Program Elements Connection) for bit-level concurrent computation. This model enables precise and formal expression of the process of computation, and a notion of primitive program elements for controlling and operating can be expressed synthetically. Specifically, the model is based on a notion of uniform primitive processes, called primitives, that have three terminals and four ordered rules at most, as well as on bidirectional communication using vehicles called carriers. A new notion is that a carrier moving between two terminals can briefly express some kinds of computation such as synchronization and bidirectional communication. The model's properties make it most applicable to bit-level computation compositionally, since the uniform computation elements are enough to develop components that have practical functionality. Through future application of the model, our research may enable further research on a base model of fine-grain parallel computer architecture, since the model is suitable for expressing massive concurrency by a network of primitives.