Architecture Exploration for a Reconfigurable Architecture Template
IEEE Design & Test
IEICE - Transactions on Information and Systems
Performance and power analysis of time-multiplexed execution on dynamically reconfigurable processor
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
CASES '10 Proceedings of the 2010 international conference on Compilers, architectures and synthesis for embedded systems
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For developing design environment of various Dynamically Reconfigurable Processor Arrays (DRPAs), the Graph with Configuration Information (GCI) is proposed to represent configurable resource in the target dynamically reconfigurable architecture. The functional unit, constant unit, register, and routing resource can be represented in the graph as well as the configuration information. The restriction in the hardware is also added in the graph by limiting the possible configuration at a node controlled by the other node. A prototype compiler called Black-Diamond with GCI is now available for three different DRPAs. It translates data-flow graph from C-like front-end description, applies placement and routing by using the GCI, and generates configuration data for each element of the DRPA. Evaluation results of simple applications show that Black-Diamond can generate reasonable designs for all three different architectures. Other target architectures can be easily treated by representing many aspects of architectural property into a GCI.