Implementation of parallel edit distance algorithm for protein sequences using reconfigurable accelerator

Authors:
Biswajit Sahoo;Tripti Swarnkar;Sudarsan Padhy
Affiliations:
KIIT University, Bhubaneswar, India;ITER, SOA University, Bhubaneswar, India;Utkal University, Bhubaneswar, India
Venue:
Proceedings of the International Conference on Advances in Computing, Communication and Control
Year:
2009

Citing 3
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Abstract

This paper describes the design of a parallel edit distance hardware, implemented in a FPGA device, using a dynamic programming (DP) algorithm. Such algorithms have computational complexity proportional to the length product of both involved sequences. The data dependency in DP imposes a serious constraint on the algorithm, not allowing its direct parallelization. To alleviate this serious problem, a reconfigurable accelerator for DP algorithm is presented. The main features include: a multistage PE (processing element) design which significantly reduces the FPGA resource usage and hence allows more parallelism to be exploited; and a pipelined control mechanism. Basing on these two techniques, the proposed accelerator can reach at 82-MHz frequency in an Altera EP1S30 device. This accelerator provides more than 380 speedup as compared to a standard desktop platform with a 2.8-GHz Xeon processor and 4-GB memory. Results show that reconfigurable computing can offer interesting solutions for bioinformatics problems.