Using reconfigurable hardware to accelerate multiple sequence alignment with ClustalW

Authors:
Tim Oliver;Bertil Schmidt;Darran Nathan;Ralf Clemens;Douglas Maskell
Affiliations:
School of Computer Engineering, Nanyang Technological University Singapore;School of Computer Engineering, Nanyang Technological University Singapore;Project Proteus, School of Engineering, Ngee Ann Polytechnic Singapore;Project Proteus, School of Engineering, Ngee Ann Polytechnic Singapore;School of Computer Engineering, Nanyang Technological University Singapore
Venue:
Bioinformatics
Year:
2005

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Abstract

Summary: Aligning hundreds of sequences using progressive alignment tools such as ClustalW requires several hours on state-of-the-art workstations. We present a new approach to compute multiple sequence alignments in far shorter time using reconfigurable hardware. This results in an implementation of ClustalW with significant runtime savings on a standard off-the-shelf FPGA. Availability: An online server for ClustalW running on a Pentium IV 3 GHz with a Xilinx XC2V6000 FPGA PCI-board is available at http://beta.projectproteus.org. The PE hardware design in Verilog HDL is available on request from the first author. Contact: tim.oliver@pmail.ntu.edu.sg