A special-purpose architecture for solving the breakpoint median problem

  • Authors:
  • Jason D. Bakos;Panormitis E. Elenis

  • Affiliations:
  • Department of Computer Science and Engineering, University of South Carolina, Columbia, SC;Department of Computer Science and Engineering, University of South Carolina, Columbia, SC

  • Venue:
  • IEEE Transactions on Very Large Scale Integration (VLSI) Systems
  • Year:
  • 2008

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Abstract

In this paper, we describe the design for a co-processor for whole-genome phylogenetic reconstruction. Our current design performs a parallelized breakpoint median computation, which is an expensive component of the overall application. When implemented on a field-programmable gate array (FPGA), our hardware breakpoint median achieves a maximum speedup of 1005× over software. When the coprocessor is used to accelerate the entire reconstruction procedure, we achieve a maximum application speedup of 417×. The results in this paper suggest that FPGA-based acceleration is a promising approach for computationally expensive phylogenetic problems, in spite of the fact that the involved algorithms are based on complex, control-dependent combinatorial optimization.