Searching for Transient Pulses with the ETA Radio Telescope
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Towards a hardware fault-injection testbed to support reproducible resiliency experiments
Proceedings of the 2009 workshop on Resiliency in high performance
Axel: a heterogeneous cluster with FPGAs and GPUs
Proceedings of the 18th annual ACM/SIGDA international symposium on Field programmable gate arrays
A hardware filesystem implementation with multidisk support
International Journal of Reconfigurable Computing - Special issue on selected papers from ReConFig 2008
Content-based image retrieval algorithm acceleration in a low-cost reconfigurable FPGA cluster
Journal of Systems Architecture: the EUROMICRO Journal
A special-purpose architecture for solving the breakpoint median problem
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Efficient communication for FPGA clusters
ARC'12 Proceedings of the 8th international conference on Reconfigurable Computing: architectures, tools and applications
International Journal of Reconfigurable Computing - Special issue on High-Performance Reconfigurable Computing
A latency-optimized hybrid network for clustering FPGAs (abstract only)
Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
International Journal of Reconfigurable Computing - Special issue on Selected Papers from the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig 2011)
The Journal of Supercomputing
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While medium- and large-sized computing centers have increasingly relied on clusters of commodity PC hardware to provide cost-effective capacity and capability, it is not clear that this technology will scale to the PetaFLOP range. It is expected that semiconductor technology will continue its exponential advancements over next fifteen years; however, new issues are rapidly emerging and the relative importance of current performance metrics are shifting. Future PetaFLOP architectures will require system designers to solve computer architecture problems ranging from how to house, power, and cool the machine, all the while remaining sensitive to cost. The Reconfigurable Computing Cluster (RCC) project is a multi-institution, multi-disciplinary project investigating the use of Platform FPGAs to build cost-effective petascale computers. This paper describes the nascent project's objectives and a 64-node prototype cluster. Specifically, the aim is to provide an detailed motivation for the project, describe the design principles guiding development, and present a preliminary performance assessment. Microbenchmark results are reported to answer several pragmatic questions about key subsystems, including the system software, network performance, memory bandwidth, power consumption of nodes in the cluster. Results suggest that the approach is sound.