HwPMI: an extensible performance monitoring infrastructure for improving hardware design and productivity on FPGAs

Authors:
Andrew G. Schmidt;Neil Steiner;Matthew French;Ron Sass
Affiliations:
Information Sciences Institute, University of Southern California, Arlington, VA;Information Sciences Institute, University of Southern California, Arlington, VA;Information Sciences Institute, University of Southern California, Arlington, VA;ECE Department, UNC Charlotte, Charlotte, NC
Venue:
International Journal of Reconfigurable Computing - Special issue on Selected Papers from the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig 2011)
Year:
2012

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Abstract

Designing hardware cores for FPGAs can quickly become a complicated task, difficult even for experienced engineers. With the addition of more sophisticated development tools and maturing high-level language-to-gates techniques, designs can be rapidly assembled; however, when the design is evaluated on the FPGA, the performance may not be what was expected. Therefore, an engineer may need to augment the design to include performance monitors to better understand the bottlenecks in the system or to aid in the debugging of the design. Unfortunately, identifying what to monitor and adding the infrastructure to retrieve the monitored data can be a challenging and time-consuming task. Our work alleviates this effort. We present the Hardware Performance Monitoring Infrastructure (HwPMI), which includes a collection of software tools and hardware cores that can be used to profile the current design, recommend and insert performance monitors directly into the HDL or netlist, and retrieve the monitored data with minimal invasiveness to the design. Three applications are used to demonstrate and evaluate HwPMI's capabilities. The results are highly encouraging as the infrastructure adds numerous capabilities while requiring minimal effort by the designer and low resource overhead to the existing design.