Gating transistor power saving technique for power optimized code book SRAM

Authors:
Madan Mali;Mukul Sutaone;Shital Tak
Affiliations:
Sinhgad College of Engg, Vadagaon(Bk), Pune;College of Engineering, Shivaji nagar, Pune;Sinhgad College of Engg, Vadagaon(Bk), Pune
Venue:
Proceedings of the International Conference on Advances in Computing, Communication and Control
Year:
2009

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Abstract

Low power feature associated with Static Random Access Memory (SRAM) is evaluated. By using gating transistor power saving technique (GTSPT), the average power of SRAM can be reduced. Using GTSPT scheme the average precharge current and the supply current is reduced which is the main cause of the power dissipation in the SRAM. While reading the data, the bitlines are always precharged. By reducing the precharge voltage, the power cane be saved. By using the sense amplifier, the data can be amplified for read operation. By adding the redundant rows and redundant columns the SRAM is made fault tolerant.