The design of a low energy FPGA
ISLPED '99 Proceedings of the 1999 international symposium on Low power electronics and design
TCG: a transitive closure graph-based representation for non-slicing floorplans
Proceedings of the 38th annual Design Automation Conference
NanoFabrics: spatial computing using molecular electronics
ISCA '01 Proceedings of the 28th annual international symposium on Computer architecture
Object Oriented Circuit-Generators in Java
FCCM '98 Proceedings of the IEEE Symposium on FPGAs for Custom Computing Machines
The Case Study of Block Turbo Decoders on a Framework for Portable Synthesis on FPGA
HICSS '06 Proceedings of the 39th Annual Hawaii International Conference on System Sciences
Regular 2D NASIC-based architecture and design space exploration
NANOARCH '11 Proceedings of the 2011 IEEE/ACM International Symposium on Nanoscale Architectures
MDE-based FPGA physical design: fast model-driven prototyping with Smalltalk
Proceedings of the International Workshop on Smalltalk Technologies
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Contrasting with the extensive research focusing on nano-devices properties and fabrication, not enough attention is probably given to computing architectures for these devices. This paper describes a method for mapping an FPGA architecture to a nano-device called NASIC (for Nano-ASIC). This mapping is an illustration of the interest of nano- and micro-architecture models stacked to quickly obtain CAD environments for the investigated technologies.