VIFI-CMP: variability-tolerant chip-multiprocessors for throughput and power

Authors:
Wan-Yu Lee;Iris Hui-Ru Jiang
Affiliations:
National Chiao Tung University, Hsinchu, Taiwan Roc;National Chiao Tung University, Hsinchu, Taiwan Roc
Venue:
Proceedings of the 19th ACM Great Lakes symposium on VLSI
Year:
2009

Citing 4
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Abstract

This paper proposes a new architecture of variability-tolerant chip-multiprocessor. To mitigate the impact of process variability on throughput and power, voltage and frequency islands are introduced into chip-multiprocessors. Thus, voltage island frequency island chip-multiprocessors enable per-core scaling on the supply voltage and operating frequency. It can naturally collaborate with dynamic voltage frequency scaling. The process variations are characterized through an analytical model, and are quantified through Monte Carlo analysis. Compared with the design without process variations, when 70 threads are run on a chip of 70 small cores, our results show throughput degradation is 0.06%, while power reduction is 36.27%.