MediaBench: a tool for evaluating and synthesizing multimedia and communicatons systems
MICRO 30 Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture
Exploiting VLIW schedule slacks for dynamic and leakage energy reduction
Proceedings of the 34th annual ACM/IEEE international symposium on Microarchitecture
The Memory Architecture and the Cache and Memory Management Unit for
The Memory Architecture and the Cache and Memory Management Unit for
An 8x8 IDCT Implementation on an FPGA-Augmented TriMedia
FCCM '01 Proceedings of the the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
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Peak power and total energy consumption are key factors in the design of embedded microprocessors. Many techniques have been shown to provide great reductions in peak power and/or energy consumption. Unfortunately, several unrealistic assumptions are often made in research studies, especially in regards to multimedia processors. This paper focuses on power reduction in real commercial processors, and how that differs from more abstract research studies. We study the power consumption of the TriMedia TM3270, an embedded, synthesized microprocessor used in several commercial products, on both and simulation tools. We find that increased functional unit utilization and memory access density causes significant differences in power consumption between compiler-optimized and carefully hand-optimized code. We also apply some simple techniques for power savings with no performance degradation, though the focus of the paper is the evaluation of such techniques, not the techniques themselves.