A tunable highly linear CMOS transconductor with 80dB of SFDR

  • Authors:

  • Mariano Jiménez-Fuentes;Ramón G. Carvajal;Lucía Acosta;Carlos Rubia-Marcos;Antonio López-Martín;Jaime Ramirez-Angulo

  • Affiliations:

  • Electronics Engineering Department, Engineering School, Sevilla University, 41092 Sevilla, Spain;Electronics Engineering Department, Engineering School, Sevilla University, 41092 Sevilla, Spain;Electronics Engineering Department, Engineering School, Sevilla University, 41092 Sevilla, Spain;Electronics Engineering Department, Engineering School, Sevilla University, 41092 Sevilla, Spain;Electrical and Electronic Engineering Department, Public University of Navarra, Spain;Klipsch School of Electrical and Computer Engineering, New Mexico State University, Mexico

  • Venue:
  • Integration, the VLSI Journal
  • Year:
  • 2009

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Abstract

This paper presents a new tunable CMOS differential transconductor with an SFDR ranging from 80 to 94dB. It is based on a core of two voltage buffers with local feedback loops to achieve low-output impedance. The two buffers drive an integrated polysilicon resistor, which is the actual transconductance element. The current generated at the resistor is delivered directly to the output using source coupled pairs. This avoids distortion generated by conventional architectures using current copying cells. The voltage buffers are based on the compact flipped voltage follower (FVF) cell. The proposed transconductor relies on the gain of local feedback loops instead of harmonic cancellation. This leads to a simpler design and less mismatch sensitivity. The proposed transconductor bandwidth is closer to that of the typical open-loop design than to one with global feedback, since the local feedback loop is much faster than a global one. It can be tuned down 20% of its maximum g"m which is enough to compensate for process variations. The proposed circuit was fabricated in a 0.5@mm CMOS technology and powered by a 5V single supply. It was measured with 2Vpp input signals up to 10MHz. The maximum g"m value is 660@mA/V. The transconductor consumes 30mW and occupies roughly a die area of 0.17mm^2. Experimental results are presented to validate the proposed circuit.