Operation and modeling of the MOS transistor
Operation and modeling of the MOS transistor
Integration, the VLSI Journal
A tunable highly linear CMOS transconductor with 80dB of SFDR
Integration, the VLSI Journal
Design of Analog CMOS Integrated Circuits
Design of Analog CMOS Integrated Circuits
A highly linear CMOS transconductance amplifier in 180 nm process technology
Analog Integrated Circuits and Signal Processing
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Mobility degradation is predominant in submicron CMOS technology. The effect of this mobility reduction in a linear operational transconductance amplifier (OTA) with signal attenuation and source degeneration is examined in this study. Theoretical analysis shows that the cubic non-linearity in the attenuator helps to improve the linearity of the source degenerated transconductor by partial cancellation of the harmonic distortion component. Such a linear transconductor and a third order low pass filter based on this linear OTA are fabricated in UMC 180 nm CMOS process technology. Experimental results show that third order intermodulation distortion of the linear OTA is less than 驴60 dB for 500 mVpp differential input signal while for 2 % transconductance variation the linear range is about 1.2 Vpp. The linear transconductor consumes only 0.45 mW of power with 1.8 V supply.