Evaluation of multiple supply and threshold voltages for low-power FinFET circuit synthesis

  • Authors:
  • Prateek Mishra;Anish Muttreja;Niraj K. Jha

  • Affiliations:
  • Dept. of Electrical Engineering, Princeton University, NJ 08544, USA;Dept. of Electrical Engineering, Princeton University, NJ 08544, USA;Dept. of Electrical Engineering, Princeton University, NJ 08544, USA

  • Venue:
  • NANOARCH '08 Proceedings of the 2008 IEEE International Symposium on Nanoscale Architectures
  • Year:
  • 2008

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Abstract

In modern circuits, power efficiency is a central determinant of circuit efficiency. The exponential increase in the number of transistors in a chip has led to increased chip power dissipation. Therefore, low-power circuits have become a top priority in modern VLSI design. With scaling, leakage power accounts for an increasingly larger portion (≫40%) of the total power consumption in deep submicron technologies.