Accelerated virtual switching with programmable NICs for scalable data center networking
Proceedings of the second ACM SIGCOMM workshop on Virtualized infrastructure systems and architectures
Accelerating OpenFlow switching with network processors
Proceedings of the 5th ACM/IEEE Symposium on Architectures for Networking and Communications Systems
Improving IPS by network processors
The Journal of Supercomputing
System performance evaluation by combining RTC and VHDL simulation: A case study on NICs
Journal of Systems Architecture: the EUROMICRO Journal
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In this paper, we propose a network interface that takes advantage of the parallelism available in network processors to improve the communication performance. Morespecifically, our proposal is based on the Intel IXP28xx network processor, as it includes sixteen processing cores with multithreading and an optimized design for packet processing. Thus, the proposed interface facilitates the exploitation of different options to optimize the communication path in the host by using network interface offloading and/or onloading strategies that try to take advantage of multi-core processors, which are available even in the network cards. The experimental results obtained for TCP/IP and raw Ethernet packets show that multithreading, implemented through the processing cores of the network processor, improves communication performance in both latency of the packets and bandwidth, thus allowing the applications that present high communication requirements to fulfill them through the use of multithreading.