A Multi-Threaded Network Interface Using Network Processors
PDP '09 Proceedings of the 2009 17th Euromicro International Conference on Parallel, Distributed and Network-based Processing
Accelerated virtual switching with programmable NICs for scalable data center networking
Proceedings of the second ACM SIGCOMM workshop on Virtualized infrastructure systems and architectures
Improving PC-based OpenFlow switching performance
Proceedings of the 6th ACM/IEEE Symposium on Architectures for Networking and Communications Systems
sNICh: efficient last hop networking in the data center
Proceedings of the 6th ACM/IEEE Symposium on Architectures for Networking and Communications Systems
Modeling and performance evaluation of an OpenFlow architecture
Proceedings of the 23rd International Teletraffic Congress
Deep packet inspection tools and techniques in commodity platforms: Challenges and trends
Journal of Network and Computer Applications
Scalable packet classification on FPGA
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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OpenFlow switching enables flexible management of enterprise network switches and experiments on regular network traffic. We present in this paper a complementary design to OpenFlow's existing reference designs. We apply network processor based acceleration cards to perform OpenFlow switching. We describe the design options and report our experiment results that show a 20% reduction on packet delay and the comparable packet forwarding throughput compared to conventional designs.