Resistive non-volatile memory devices (Invited Paper)

Authors:
Rainer Waser
Affiliations:
Jülich-Aachen Research Alliance, Section Fundamentals of Future Information Technology (JARA-FIT), RWTH Aachen University and Forschungszentrum Jülich, Germany
Venue:
Microelectronic Engineering
Year:
2009

Citing 0
Cited 3

Memristor-based memory: The sneak paths problem and solutions

Microelectronics Journal
Robust learning approach for neuro-inspired nanoscale crossbar architecture

ACM Journal on Emerging Technologies in Computing Systems (JETC) - Special Issue on Reliability and Device Degradation in Emerging Technologies and Special Issue on WoSAR 2011
Memristor-based combinational circuits: A design methodology for encoders/decoders

Microelectronics Journal

Quantified Score

Hi-index	2.88

Visualization

Abstract

The review provides a survey of non-volatile, highly scalable memory devices which are based on redox phenomena controlling the resistance of nanoscale memory cells. The classification of the memory effects, the understanding of the underlying mechanisms, and a sketch of the integration efforts will be presented.