BitSNAP: Dynamic Significance Compression for a Low-Energy Sensor Network Asynchronous Processor
ASYNC '05 Proceedings of the 11th IEEE International Symposium on Asynchronous Circuits and Systems
A 36μW heartbeat-detection processor for a wireless sensor node
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Patient Outcome Prediction with Heart Rate Variability and Vital Signs
Journal of Signal Processing Systems
Body Area Networks for Ubiquitous Healthcare Applications: Opportunities and Challenges
Journal of Medical Systems
Dynamic, location-based channel selection for power consumption reduction in EEG analysis
Computer Methods and Programs in Biomedicine
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Wireless sensor nodes span a wide range of applications. This paper focuses on the biomedical area, more specifically on healthcare monitoring applications. Power dissipation is the dominant design constraint in this domain. This paper shows the different steps to develop a digital signal processing architecture for a single channel electrocardiogram application, which is used as an application example. The target power consumption is 100 μW as that is the power energy scavengers can deliver. We follow a bottleneck-driven approach: first the algorithm is tuned to the target processor, then coarse grained clock-gating is applied, next the static as well as the dynamic dissipation of the digital processor is reduced by tuning the core to the target domain. The impact of each step is quantified. A solution of 11 μW is possible for both radio and DSP running the electrocardiogram algorithm.