A method in CMOS analog circuit optimization by genetic algorithm

Authors:
Jianhai Yu;Zhigang Mao
Affiliations:
Microelectronics Center, Harbin Institute of Technology, Harbin, China;Microelectronics Center, Harbin Institute of Technology, Harbin, China
Venue:
IMCAS'09 Proceedings of the 8th WSEAS international conference on Instrumentation, measurement, circuits and systems
Year:
2009

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Abstract

A new method based on adaptive GA (genetic algorithm) and manual experience for sizing and optimizing the CMOS analog circuits is presented in this paper. In the method the simulation tool is called to produce the fitness of every circuit in a population. According to the evaluation of the fitness we can choose the better circuits. By adjusting the sizes of the transistor through GA and restricting the searching space depending on manual experience we make up the next generation for the evolution. Our goal is to find the circuit which can satisfy our specification. The results of the simulation for a two-stage operational amplifier show that this is an accurate and novel way in CMOS analog circuits design.