Brief announcement: the impact of classical electronics constraints on a solid-state logical qubit memory

  • Authors:

  • James E. Levy;Anand Ganti;Cynthia A. Phillips;Benjamin R. Hamlet;Andrew J. Landahl;Thomas M. Gurrieri;Robert D. Carr;Malcolm S. Carroll

  • Affiliations:

  • Sandia National Laboratories, Albuquerque, NM, USA;Sandia National Laboratories, Albuquerque, NM, USA;Sandia National Laboratories, Albuquerque, NM, USA;Sandia National Laboratories, Albuquerque, NM, USA;Sandia National Laboratories, Albuquerque, NM, USA;Sandia National Laboratories, Albuqueruqe, NM, USA;Sandia National Labortories, Albuquerque, NM, USA;Sandia National Laboratories, Albuquerque, NM, USA

  • Venue:
  • Proceedings of the twenty-first annual symposium on Parallelism in algorithms and architectures
  • Year:
  • 2009

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Abstract

We present and analyze an architecture for a logical qubit memory that is tolerant of faults in the processing of silicon double quantum dot (DQD) qubits. A highlight of our analysis is an in-depth consideration of the constraints faced when integrating DQDs with classical control electronics.