List scheduling with and without communication delays
Parallel Computing
PathFinder: a negotiation-based performance-driven router for FPGAs
FPGA '95 Proceedings of the 1995 ACM third international symposium on Field-programmable gate arrays
Fast, effective dynamic compilation
PLDI '96 Proceedings of the ACM SIGPLAN 1996 conference on Programming language design and implementation
Calpa: a tool for automating selective dynamic compilation
Proceedings of the 33rd annual ACM/IEEE international symposium on Microarchitecture
Quantum computation and quantum information
Quantum computation and quantum information
DAC '84 Proceedings of the 21st Design Automation Conference
LLVA: A Low-level Virtual Instruction Set Architecture
Proceedings of the 36th annual IEEE/ACM International Symposium on Microarchitecture
Transport of quantum states and separation of ions in a dual RF ion trap
Quantum Information & Computation
A Quantum Logic Array Microarchitecture: Scalable Quantum Data Movement and Computation
Proceedings of the 38th annual IEEE/ACM International Symposium on Microarchitecture
Distributed Arithmetic on a Quantum Multicomputer
Proceedings of the 33rd annual international symposium on Computer Architecture
Quantum Memory Hierarchies: Efficient Designs to Match Available Parallelism in Quantum Computing
Proceedings of the 33rd annual international symposium on Computer Architecture
A program transformation and architecture support for quantum uncomputation
Proceedings of the 12th international conference on Architectural support for programming languages and operating systems
Automated generation of layout and control for quantum circuits
Proceedings of the 4th international conference on Computing frontiers
Proceedings of the 34th annual international symposium on Computer architecture
Arithmetic on a distributed-memory quantum multicomputer
ACM Journal on Emerging Technologies in Computing Systems (JETC)
High-level interconnect model for the quantum logic array architecture
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Microcoded Architectures for Ion-Tap Quantum Computers
ISCA '08 Proceedings of the 35th Annual International Symposium on Computer Architecture
A fault tolerant, area efficient architecture for Shor's factoring algorithm
Proceedings of the 36th annual international symposium on Computer architecture
Proceedings of the twenty-first annual symposium on Parallelism in algorithms and architectures
A library-based synthesis methodology for reversible logic
Microelectronics Journal
Quantum physical synthesis: Improving physical design by netlist modifications
Microelectronics Journal
Auxiliary qubit selection: a physical synthesis technique for quantum circuits
Quantum Information Processing
Minimizing the latency of quantum circuits during mapping to the ion-trap circuit fabric
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Quantum circuit physical design methodology with emphasis on physical synthesis
Quantum Information Processing
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The theoretical study of quantum computation has yielded efficient algorithms for some traditionally hard problems. Correspondingly, experimental work on the underlying physical implementation technology has progressed steadily. However, almost no work has yet been done which explores the architecture design space of large scale quantum computing systems. In this paper, we present a set of tools that enable the quantitative evaluation of architectures for quantum computers. The infrastructure we created comprises a complete compilation and simulation system for computers containing thousands of quantum bits. We begin by compiling complete algorithms into a quantum instruction set. This ISA enables the simple manipulation of quantum state. Another tool we developed automatically transforms quantum software into an equivalent, fault-tolerant version required to operate on real quantum devices. Next, our infrastructure transforms the ISA into a set of low-level micro architecture specific control operations. In the future, these operations can be used to directly control a quantum computer. For now, our simulation framework quickly uses them to determine the reliability of the application for the target micro architecture. Finally, we propose a simple, regular architecture for ion-trap based quantum computers. Using our software infrastructure, we evaluate the design trade offs of this micro architecture.