SOI, interconnect, package, and mainboard thermal characterization

  • Authors:
  • Joseph Nayfach-Battilana;Jose Renau

  • Affiliations:
  • UC Santa Cruz, Santa Cruz, CA, USA;UC Santa Cruz, Santa Cruz, CA, USA

  • Venue:
  • Proceedings of the 14th ACM/IEEE international symposium on Low power electronics and design
  • Year:
  • 2009

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Abstract

This paper presents an evaluation to determine the importance of the accurate thermal characterization for several elements of a semiconductor device. Specifically, it evaluates whether the decision to simplify or neglect to model metal interconnect density variation, Silicon-On-Insulator technology, the chip package, or the system main-board can effect the overall accuracy of a thermal model. In performing this evaluation, we motivate the need for more accurate thermal characterization of semiconductor devices. Through this analysis, designers are better able to understand how simplifications to their temperature models can effect the validity of design decisions derived from such models. To perform this evaluation, a novel temperature modeling infrastructure was designed that offers engineers a new way to explore solutions to a growing array of engineering problems that require accurate thermal characterization of semiconductor devices. The modeling framework, called SESCTherm, is a state-of-the-art finite-difference-based thermal modeling system.