Building Many-Core Processor-to-DRAM Networks with Monolithic CMOS Silicon Photonics

Authors:
Christopher Batten;Ajay Joshi;Jason Orcutt;Anatol Khilo;Benjamin Moss;Charles W. Holzwarth;Miloš A. Popovic;Hanqing Li;Henry I. Smith;Judy L. Hoyt;Franz X. Kartner;Rajeev J. Ram;Vladimir Stojanovic;Krste Asanovic
Affiliations:
Massachusetts Institute of Technology;Massachusetts Institute of Technology;Massachusetts Institute of Technology;Massachusetts Institute of Technology;Massachusetts Institute of Technology;Massachusetts Institute of Technology;Massachusetts Institute of Technology;Massachusetts Institute of Technology;Massachusetts Institute of Technology;Massachusetts Institute of Technology;Massachusetts Institute of Technology;Massachusetts Institute of Technology;Massachusetts Institute of Technology;University of California, Berkeley
Venue:
IEEE Micro
Year:
2009

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Abstract

Silicon photonics is a promising technology for addressing memory bandwidth limitations in future many-core processors. This article first introduces a new monolithic silicon-photonic technology, which uses a standard bulk CMOS process to reduce costs and improve energy efficiency, and then explores the logical and physical implications of leveraging this technology in processor-to-memory networks.